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HAT1055R, HAT1055RJ
Silicon P Channel Power MOS FET High Speed Power Switching
REJ03G0067-0100Z Rev.1.00 Aug.29.2003
Features
* * * * Low on-resistance Capable of 4.5 V gate drive High density mounting "J" is for Automotive application High temperature D-S leakage guarantee Avalanche rating
Outline
SOP-8
8 5 76
3 12 78 DD 56 DD
4
2 G
4 G
S1
S3
1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain
MOS1
MOS2
Rev.1.00, Aug.29.2003, page 1 of 9
HAT1055R, HAT1055RJ
Absolute Maximum Ratings
(Ta = 25C)
Item Symbol Ratings HAT1055R Drain to source voltage Gate to source voltage Drain current Drain peak current Avalanche current Avalanche energy Channel dissipation Channel dissipation Channel temperature Storage temperature Notes: 1. 2. 3. 4. VDSS VGSS ID ID (pulse) IAP
Note4 Note4 EAR Note1
Unit HAT1055RJ -60 20 -5 -40 -5 2.14 2 3 150 -55 to +150 V V A A A mJ W W C C
-60 20 -5 -40 -- -- 2 3 150 -55 to +150
Pch
Note2
PchNote3 Tch Tstg
PW 10s, duty cycle 1% 1 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s 2 Drive operation: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW 10 s Value at Tch = 25C, Rg 50
Rev.1.00, Aug.29.2003, page 2 of 9
HAT1055R, HAT1055RJ
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Symbol Min V(BR)DSS -60 Typ -- -- -- -- -- -- -- 5 60 90 1350 135 85 21 3 4 20 15 55 10 -0.85 25 Max -- -- -1 -- -10 10 -2.5 -- 76 130 -- -- -- -- -- -- -- -- -- -- -1.10 -- Unit V V A A A A V S m m pF pF pF nC nC nC ns ns ns ns V ns VDD = -25 V VGS = -10 V ID = -5 A VGS = -10 V, ID= -2.5 A VDD -30 V RL = 12 RG = 4.7 IF = -5 A, VGS = 0Note5 IF = -5 A, VGS = 0 diF/dt = 100 A/s Test Conditions ID = -10 mA, VGS = 0 IG = 100 A, VDS = 0 VDS = -60 V, VGS = 0 VDS = -48 V, VGS = 0 Ta = 125C VGS = 16 V, VDS = 0 VDS = -10 V, ID = -1 mA ID = -2.5 ANote5, VDS = -10 V ID = -2.5 ANote5, VGS = -10 V ID = -2.5 ANote5, VGS = -4.5 V VDS = -10 V, VGS = 0 f = 1 MHz
Gate to Source breakdown voltage V(BR)GSS 20 Zero gate voltage drain current Zero gate voltage drain current HAT1055R IDSS IDSS IGSS VGS(off) |yfs| RDS(on) RDS(on) Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF -- -- -- -- -1.0 3 -- -- -- -- -- -- -- -- -- -- -- -- -- --
HAT1055RJ IDSS
Gate to source leak current Gate to source cutoff voltage Forward transfer admittance Static drain to source on state resistance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage
Body-drain diode reverse recovery trr time Notes: 5. Pulse test
Rev.1.00, Aug.29.2003, page 3 of 9
HAT1055R, HAT1055RJ
Main Characteristics
Power vs. Temperature Derating 4.0
Pch (W) (A)
Test Condition: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm) PW 10 s
-100 -30 -10 -3 -1 -0.3
3.0
Channel Dissipation
Drain Current ID
Maximum Safe Operation Area 10 s 10 0 s PW 1 ms =1 0m DC s O
pe rat ion (P W < 1 ote 0s6 )
N
2.0
1
2 iv Dr e e Op
-0.1 Operation in
this area is
1.0
Dr
ive
Op
er
at
ion
0
50
100
150 Ta (C)
200
Ambient Temperature
-0.03 limited by R DS(on) -0.01 Ta = 25C -0.003 1 shot Pulse -0.001 -0.1 -0.3 -1 -3 -10 -30 -100 Drain to Source Voltage VDS (V) Note 6: When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
Typical Output Characteristics -10 -10 V
(A)
ra n tio
Typical Transfer Characteristics -10 VDS = -10 V Pulse Test
(A)
Pulse Test -8
-8
-6 V -4.5 V
-3.5 V
Drain Current ID
-6
-4
-2 VGS =-2.5 V 0 -2 -4 -6 Drain to Source voltage -8 VDS (V) -10
Drain Current ID
-6
-4
-2 Tc = 75C 0 -1 -2 25C -25C -3 -4 -5
Gate to Source Voltage
VGS (V)
Rev.1.00, Aug.29.2003, page 4 of 9
HAT1055R, HAT1055RJ
Static Drain to Source on State Resistance vs. Drain Current 1.0 Pulse Test 0.5 0.2 0.1 VGS = -4.5 V
Drain to Source Saturation Voltage VDS(on) (V)
-1 Pulse Test -0.8
-0.6
-0.4 ID = -5 A -0.2 0 0 -2 A -1 A -4 -8 -12 -16 -20
Drain to Source on State Resistance RDS(on) ()
Drain to Source Saturation Voltage vs. Gate to Source Voltage
0.05
-10 V
0.02 0.01 -1
-3
-10
-30
-100
Gate to Source Voltage
VGS (V)
Drain Current ID (A)
Static Drain to Source on State Resistance RDS(on) ()
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance vs. Temperature 0.25 Pulse Test 0.20 -5 A 0.15 VGS = -4.5 V 0.10 -5 A -1, -2 A ID = -1, -2 A
50 20 10 5 2 1
Forward Transfer Admittance vs. Drain Current
Tc = -25C 25C 75C
0.05 0 -40
-10 V 0 40 80
V DS = -10 V Pulse Test -1 -3 -10 -30 -100
120 Tc (C)
160
0.5 -0.1 -0.3
Case Temperature
Drain Current ID (A)
Rev.1.00, Aug.29.2003, page 5 of 9
HAT1055R, HAT1055RJ
Body-Drain Diode Reverse Recovery Time 1000 5000
Typical Capacitance vs. Drain Source Voltage
Reverse Recovery Time trr (ns)
Capacitance C (pF)
500
di / dt = 100 A / s VGS = 0, Ta = 25C
2000 1000 500 200 100 50 Coss Crss 20 10 VGS = 0 f = 1 MHz 0 -10 -20 -30 -40 (V) -50 Ciss
200 100 50
20 10 -0.1 -0.3
-1
-3
-10
-30
-100
Reverse Drain Current
IDR (A)
Drain Source Voltage VDS
Dynamic Input Characteristics
Switching Characteristics
VDS (V)
-20
VDD = -10 V -25 V -50 V ID = -5 A
Gate to Source Voltage VGS (V) Switching Time t (ns)
0
0
1000 300 100 30 10 3 1 -0.1 -0.3 tf VGS = -10 V, VDS = -30 V PW = 5 s, duty < 1 % -1 -3 -10 -30 Drain Current ID (A) -100 t d(off) tr t d(on)
-4
Drain to Source Voltage
-40 VDS -60 VDD = -10 V -25 V -50 V VGS
-8
-12
-80
-16 -20 40
-100
0
8 16 24 32 Gate Charge Qg (nc)
Rev.1.00, Aug.29.2003, page 6 of 9
HAT1055R, HAT1055RJ
Reverse Drain Current vs. Source to Drain Voltage
Repetitive Avalanche Energy EAR (mJ)
Maximum Avalanche Energy vs. Channel Temperature Derating 2.5 I AP = -5 A V DD = -25 V duty < 0.1 % Rg > 50
-10
(A)
Pulse Test -8 -10 V -6 -5 V V GS = 0, 5 V
Reverse Drain Current IDR
2.0
1.5
-4
1.0 0.5 0 25
-2 0 0
-0.4 -0.8 -1.2 -1.6 -2.0 Source Drain Voltage VSD (V)
50
75
100
125
150
Channel Temperature Tch (C) Avalanche Waveform EAR = 1 2 L * I AP *
2
Avalanche Test Circuit
VDSS VDSS - V DD
V DS Monitor
L I AP Monitor
V (BR)DSS I AP VDD ID V DS
Rg Vin -15 V
D. U. T
50 0 VDD
Switching Time Test Circuit Vin Monitor Rg D.U.T. RL Vout Monitor Vin
Switching Time Waveform
10% 90%
Vin -10 V
V DD = -30 V Vout td(on)
90% 10% tr td(off)
90% 10% tf
Rev.1.00, Aug.29.2003, page 7 of 9
HAT1055R, HAT1055RJ
Normalized Transient Thermal Impedance vs. Pulse Width (1 Drive Operation)
Normalized Transient Thermal Impedance s (t)
10
D=1 1
0.1
0.05
0.02
0.01
0.01
p ot uls e
ch - f(t) = s (t) x ch - f ch - f = 125C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
PDM PW T
0.001
h 1s
D=
PW T
0.0001 10
100
1m
10 m
100 m 1 10 Pulse Width PW (S)
100
1000
10000
Normalized Transient Thermal Impedance vs. Pulse Width (2 Drive Operation) 10
Normalized Transient Thermal Impedance s (t)
1
D=1 0.5
0.2
0.1
0.1 0.05
0.02
0.01
0.01
lse
ch - f(t) = s (t) x ch - f ch - f = 166C/W, Ta = 25C When using the glass epoxy board (FR4 40 x 40 x 1.6 mm)
PDM PW T
0.001
1s
ho
u tp
D=
PW T
0.0001 10
100
1m
10 m
100 m 1 10 Pulse Width PW (S)
100
1000
10000
Rev.1.00, Aug.29.2003, page 8 of 9
HAT1055R, HAT1055RJ
Package Dimensions
As of January, 2003
Unit: mm
4.90 5.3 Max 5 8
1
4
3.95
*0.22 0.03 0.20 0.03
1.75 Max
0.75 Max
6.10 - 0.30
+ 0.10
1.08 0 - 8
+ 0.67
0.14 - 0.04
+ 0.11
1.27
0.60 - 0.20
*0.42 0.08 0.40 0.06
0.15 0.25 M
*Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass (reference value) FP-8DA Conforms -- 0.085 g
Rev.1.00, Aug.29.2003, page 9 of 9
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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